От: fpga journal update [news@fpgajournal.com]
Отправлено: 19 января 2005 г. 2:42
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol VI No 3


a techfocus media publication :: January 18, 2005 :: volume VI, no. 3


FROM THE EDITOR

This week we delve into the realm of high-level design with two articles. First, we take a look at languages and methodologies beyond the current RTL/HDL standard in "Leading Languages". We have looked into our crystal ball and seen the future of design (again) and here is our best updated guess as to what that future holds.

Next we have a contributed article from Poseidon Systems on methodologies and tools for accelerating processor-based systems with effective hardware/software partitioning. Poseidon is a new entrant into the race for the perfect partitioning environment, and this article explains the new company's design philosophy and initial offering.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal

LATEST NEWS

January 18, 2005

Avnet Electronics Marketing Launches New SpeedWay Seminar in February 2005: 'Enabling DSP Applications with Xilinx FPGAs'

Avnet Electronics Marketing Adds to Xilinx Virtex-4 Kit Offering; Release of New Evaluation Kit Provides Multiple Options For Xilinx LX Platform

DSS Networks, The Gigabit Experts, Today Announced First to Market Extreme Performance PCI-Express Product - a Hybrid 8-Port Gigabit Ethernet Switch/Interface Card in a PCI-Express Form Factor with Onboard FPGA for Management and Control

January 17, 2005

Mercury Computer Systems, Inc. Announces Availability of its Serial RapidIO-Based Silicon IP Core

Join Altera and Leading Industry Experts at the High-Speed Serial Interconnect Seminar

LSI Logic Sets New Logic and Memory Standard with RapidChip Integrator2 Family

Tensilica Presents at Electronic Imaging Conference; Tensilica Chosen to Discuss Company's Unique Architecture

Spectrum Secures Contract with Government Defense Agency for Wideband Communications Intelligence Application

January 14, 2005

Tensilica Presents at Electronic Imaging Conference; Tensilica Chosen to Discuss Company's Unique Architecture

January 12, 2005

Analog Devices Doubles 16-Bit Converter Speed to One Billion Samples Per Second

TEK Microsystems and QinetiQ Form Commercial Alliance for Product Development and Distribution

Jasper Design Automation Acquires Safelogic Corporation; Merger to Accelerate Proliferation of Formal Verification

Tensilica Uses Synopsys Design Compiler FPGA Tool to Improve Prototyping Design Flow

QuickLogic Document Summarizes Advantages of Partitioning Designs for Algorithm Acceleration

Actel FPGAs Continue to Support Mars Rover Mission

Xilinx PlanAhead V2.2 Tool Delivers up to 2x Performance Boost and 50% Design Cycle Reduction for Virtex-4 FPGAs

January 11, 2005

Xilinx Jumps to No. 5 on Fortune Magazine's Annual List of '100 Best Companies to Work For'

CURRENT FEATURE ARTICLES

Leading Languages
Is There a Future Beyond RTL?
Accelerating Processor-based Systems
by Farzad Zarrinfar, Bill Salefski, and Stephen Simon, Poseidon Design Systems
Debug Dilemma
Simulate or Emulate?
Deliver Products On-Time with
RTL Hardware Debug

by Dennis McCarty, Technical Marketing Manager, Synplicity
Fresh Findings

New FPGA Products Hit the Streets
FPGAs Supplant Processors and ASICs In Advanced Imaging Applications

by Craig Sanderson and Dave Shand, Nallatech Inc.
What's Time to a Pig?
FPGA at the End of 2004
3rd Party EDA
Tools from Other Sources

Leading Languages
Is There a Future Beyond RTL?

I still check occasionally on gizmodo.com or engadget.com, but I've pretty much given up hope. It's now 2005. Throughout my childhood, I was convinced that by this year I'd be flying around in my jetpack, or at least driving my flying car. My personal robot is a bit closer to reality, but still not in the cards for the foreseeable future, unless I just want my floors vacuumed. The one-MIPS supercomputer I had visualized in my basement, however, complete with dumb terminal and tape drives, has far exceeded expectations.

Our view of the future is always distorted, even if we have pretty solid trends to extrapolate. Either an anticipated key technology fails to mature, or an unexpected breakthrough occurs pushing a dark horse into the lead. In 1995, I was certain that RTL design would be dead by now, and that everyone would be designing digital hardware in behavioral VHDL. The enabling technology I was expecting was behavioral synthesis. Like those personal jetpacks, a few first-generation behavioral synthesis efforts got off the ground, but none ever proved sturdy or reliable enough that you'd want to strap-in your career and light the fuse. Instead, RTL design has clung to life in the mainstream, bolstered by increasingly elaborate scaffolding that strains under the weight of bloated semantics with today's monstrous designs. [more]


Accelerating Processor-based Systems
by Farzad Zarrinfar, Bill Salefski, and
Stephen Simon, Poseidon Design Systems

Designing an efficient processor-based system architecture with overall system performance optimized for a specific application is not trivial, requiring skills and technology similar to those employed by supercomputer designers. Accomplishing this feat requires new tools and methodologies to augment the EDA flow for both traditional ASIC design and the new class of programmable SoCs, e.g., FPGAs. Architectures and performance must be verified early in the design cycle; the designer cannot wait until RTL development to discover their architecture does not support their system requirements.

Problems to Solve
Current processor tools have not kept up with the challenges of the new high-performance systems. Designers need tools to explore and exploit performance, power, and cost opportunities in their processor-based designs. [more]

ANNOUNCEMENTS

The Xilinx Virtex-4 SX Evaluation Kit was developed by
Avnet Electronics Marketing to create a stable platform to
develop and test designs targeted to the revolutionary
Xilinx Virtex-4 Platform FPGA family. This evaluation kit
features an XC4VSX35-FF668 device, which is optimized
for digital signal processing applications.  Demonstration
code is included with the kit to exercise peripherals featured on the evaluation board for a quick start to device familiarization.
Click here for additional information about the kit and to purchase the kit today.


Hire the best FPGA talent in the industry with FPGA Journal Job Listings. Starting this month you can reach 30,000 active FPGA professionals by advertising your FPGA-related positions in Journal Jobs. Click here for info.


FPGA Journal has teamed with Demos on Demand™ to provide streaming video demos from over 70 EDA, PLD and IP vendors to our readers.  Programming is comprised of in-depth product demos from across the entire spectrum of IC design, from ESL design entry through layout--as presented by product managers, AEs, and other subject matter experts.
More info.


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